Real-Time Audio Equalizer

Deployed real-time DSP filters on embedded hardware.

year: Nov 2025 — Dec 2025
role: Course Project
location: KTH Royal Institute of Technology
category: Academic

[hardware & signal path]

ESP32-S3 with ES8388 audio codec board — fig.01 // esp32-s3 + es8388 codec — real-time audio hardware

Real-time equalizer data-flow schematic — fig.02 // real-time equalizer data-flow schematic

Context

Ported a custom 65-tap complementary FIR filter architecture onto a bare-metal ESP32-S3 hardware platform to achieve real-time 48 kHz stereo audio equalization.

Hardware Interface

Configured an ES8388 audio codec via an I2C control bus and established a low-latency, high-speed I2S data bus to stream and process blocking 1024-sample audio blocks.

Implementation

Engineered dual processing pathways within the firmware: a direct time-domain ring-buffer convolution scheme and a high-efficiency frequency-domain Overlap-Save FFT algorithm.

Performance

Validated real-time system stability by streaming live music tracks, acoustically verifying the distinct high/low frequency isolation thresholds while ensuring zero processing distortion.

ESP32-S3ES8388 Audio CodecI2S / I2C ProtocolsOverlap-Save FFTReal-Time Systems

Artifact Removal in EEG Signals

open →